AMD debuted its sixth-generation Epyc server processors, codenamed Venice, built on the new Zen 6 architecture and fabricated on TSMC's N2P process node2,5. The lineup comprises 10 CPUs split into two groups: high-core-count parts with relatively slower clocks and lower-core-count parts with higher frequencies, both optimized for AI agent workloads.
The flagship Epyc 9996 packs 256 cores per socket, while the 96-core Epyc 9686F reaches a base clock of 4.05 GHz and boosts to 5.3 GHz4. Across the range, AMD claims an average 27 percent uplift in instructions per clock over Zen 5 across AI and server workloads, with IPC gains between 20 and 31 percent depending on the SKU3.
Architectural overhaul
Zen 6 is more than a clock bump. AMD redesigned the vector engine to natively support half-precision FP16 instructions alongside 32-bit precision and split the integer schedulers inside the execution engine to allow more instructions in flight. The single I/O die of prior generations is now divided across two dies, giving the SP7 platform access to 16 memory channels, though at the cost of PCIe 6.0 lane count relative to the previous generation and the SP8 platform. Core-complex dies also grew: a standard Zen 6 CCD scales to 12 cores, up from eight on Zen 5, while a Zen 6c CCD holds 32 cores versus 16 on Zen 5c.
Branch misprediction recovery latency dropped as well, falling to roughly 3 to 3.5 nanoseconds of extra time per branch on Zen 6 from roughly 3.5 to 4 nanoseconds on Zen 56.
Benchmark positioning
In StorageReview's testing, two Epyc 9996 processors in a Dell PowerEdge R9825 ran the GROMACS benchPEP simulation 1.8 times faster than the 384-core Epyc 9965 server, solved a large OpenFOAM mesh 2.6 times faster, and encrypted AES-256-GCM 1.7 times faster at 6.8 TB/s. A single socket served 76.5 million Valkey GET requests per second. Tom's Hardware reported that a dual Epyc 9996 configuration delivered up to 93 percent higher performance than a dual Zen 5 Epyc 9965 setup, and that the Epyc 9686F often beat Nvidia's Vera CPU7.
AMD also claims Epyc 6 chips can support up to 3.3 times more agents per watt than Nvidia's Vera CPU and says the series significantly outperforms comparable Intel silicon.
Agentic AI and licensing economics
AMD is framing Venice explicitly around the emerging agentic AI market1. AI agents run neural networks on GPUs but rely on CPUs to power their tools, the applications through which they carry out tasks. Deploying agent tooling on fewer, higher-frequency cores can reduce software licensing costs for per-core-billed applications such as databases.
ANALYSIS The two-tier SKU strategy, pairing dense core-count parts with high-frequency alternatives, lets AMD target both throughput-heavy inference clusters and cost-sensitive enterprise deployments where per-core licensing dominates total cost of ownership.
The enterprise-focused Venice SP8 platform and Verano, AMD's answer to Nvidia's Vera, are slated to arrive in 2027.